september 2001 2001 fairchild semiconductor corporation FDS6961AZ rev c (w) FDS6961AZ dual n - channel logic level powertrench mosfet general description these n - channel logic level mosfets are produced using fairchild semiconductor?s advanced powertrench process that has been especially tailored to minimize the on - state resistan ce and yet maintain superior switching performance. these devices are well suited for low voltage and battery powered applications where low in - line power loss and fast switching are required. features 3.5 a, 30 v. r ds(on) = 90 m w @ v gs = 10 v r ds(on) = 140 m w @ v gs = 4.5 v low gate charge (2.1 nc typical) esd protection diode (note 3) high performance trench technology for extremely low r ds(on) high power and current handling capability 4 5 3 6 2 7 1 8 q1 q2 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain - source voltage 30 v v gss gate - source voltage 20 v i d drain current ? continuous (note 1a) 3.5 a ? pulsed 14 power dissipation for dual operation 2 power dissipation for single operation (note 1a) 1.6 (note 1b) 1 p d (note 1c) 0.9 w t j , t stg operating and storage junction temperature range ? 55 to +150 c thermal characteristics r q ja thermal resistance, junction - to - ambient (note 1a) 78 c/w r q jc thermal resista nce, junction - to - case (note 1) 40 c/w package marking and ordering information device marking device reel size tape width quantity FDS6961AZ FDS6961AZ 13?? 12mm 2500 units FDS6961AZ
FDS6961AZ rev c (w) electrical characteristics t a = 25c unless otherwise noted symbol parame ter test conditions min typ max units off characteristics bv dss drain ? source breakdown voltage v gs = 0 v, i d = 250 m a 30 v d bv dss d t j breakdown voltage temperature coefficient i d = 250 m a, referenced to 25 c 24 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v v ds = 24 v, v gs = 0 v, t j = 55 c 1 10 m a i gssf gate ? body leakage, forward v gs = 20 v, v ds = 0 v 10 m a i gssr gate ? body leakage, reverse v gs = ? 20 v, v ds = 0 v ? 10 m a on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 m a 1 1.9 3 v d v gs(th) d t j gate threshold voltage temperature coefficient i d = 250 m a, r eferenced to 25 c ? 4 mv/ c r ds(on) static drain ? source on ? resistance v gs = 10 v, i d = 3.5 a v gs = 4.5 v, i d = 2.8 a v gs = 10 v, i d = 3.5 a, t j = 125 c 70 90 104 90 140 143 m w i d(on) on ? state drain current v gs = 10 v, v ds = 5 v 14 a g fs forward transconductance v ds = 5 v, i d = 3.5 a 8 s dynamic characteristics c iss input capacitance 216 pf c oss output capacitance 48 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 21 pf switching characteristics (note 2 ) t d(on) turn ? on delay time 6.5 13 ns t r turn ? on rise time 5 10 ns t d(off) turn ? off delay time 9.5 19 ns t f turn ? off fall time v dd = 15 v, i d = 1 a, v gs = 10 v, r gen = 6 w 2 4 ns q g total gate charge 2.1 3 nc q gs gate ? source charge 0.9 nc q gd gate ? drain charge v ds = 15 v, i d = 3.5 a, v gs = 5 v 0.7 nc dr ain ? source diode characteristics and maximum ratings i s maximum continuous drain ? source diode forward current 1.3 a v sd drain ? source diode forward voltage v gs = 0 v, i s = 1.3 a (note 2) 0.8 1.2 v notes: 1. r q ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. a) 78c/w when mounted on a 0.5in 2 pad of 2 oz copper b) 125c/w when mounted on a 0.02 in 2 pad of 2 oz copper c) 135c/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 m s, duty cycle < 2.0% 3. the diode connected between the gate and source serves only as protection against esd. no gate overvoltage rating is implied FDS6961AZ
FDS6961AZ rev c (w) typical characteristics 0 2 4 6 8 10 12 14 0 1 2 3 4 5 v ds , drain to source voltage (v) i d , drain current (a) v gs = 10v 4.5v 3.0v 3.5v 4.0v 6.0v 0.8 1 1.2 1.4 1.6 1.8 2 0 2 4 6 8 10 12 14 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 3.5v 4.5v 6.0v 5.0v 10v 4.0v figure 1. on - region characteristics. figure 2. on - resistance variation with drain current and gate vo ltage. 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 175 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 3.5a v gs = 10v 0.05 0.08 0.11 0.14 0.17 0.2 0.23 2 4 6 8 10 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 1.8a t a = 125 o c t a = 25 o c figure 3. on - resistance variation with temperature. figure 4. on - resistance variation with gate - to - source voltage. 0 2 4 6 8 10 12 1.5 2 2.5 3 3.5 4 4.5 5 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , body diode forward voltage (v) i s , reverse drain current (a) v gs = 0v t a = 125 o c 25 o c -55 o c figure 5. transfer cha racteristics. figure 6. body diode forward voltage variation with source current and temperature. FDS6961AZ
FDS6961AZ rev c (w) typical characteristics (continued) 0 2 4 6 8 10 0 1 2 3 4 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 3.5 a v ds = 10v 15v 20v 0 50 100 150 200 250 300 0 5 10 15 20 v ds , drain to source voltage (v) capacitance (pf) c iss c oss c rss f = 1 mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitanc e characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms 100 m s r ds(on) limit v gs = 10v single pulse r q ja = 135 o c/w t a = 25 o c 10ms 1ms 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 t 1 , time (sec) p(pk), peak transient power (w) single pulse r q ja = 135c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r q ja (t) = r(t) + r q ja r q ja = 135 o c/w t j - t a = p * r q ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal character ization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. FDS6961AZ
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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